Milestone map
Milestone map
4 milestones
Semiconductors, pn junctions and BJTs
about 3 weeks (about 12 hrs/week)
Read the 6.012 notes for lectures 1–8 (carriers, drift and diffusion, the pn junction, the BJT); solve problem sets 1–4. Then solve 6.012 problem sets 1–4, then exam 1 from 2009, 2008 or 2006. Self-check: MIT 6.012 exams with solutions (2006, 2008, 2009). Free tools only.
Proof required
Link the public repo with 6.012 problem sets 1–4, then exam 1 from 2009, 2008 or 2006 written up (a typeset PDF, LaTeX source or notebook), and show the self-check: which answers matched and how you fixed the ones that did not.
What gets checked
- Carrier concentrations are worked out with the right assumptions stated.
- Diode I–V answers carry units and sensible orders of magnitude.
- The exam is marked against its solution, with the score stated.
Common mistakes
- Answers copied from a solution with no working.
- Missing units, or a sign or factor-of-2π slip left unexplained.
Powstik Guide
A public write-up of 6.012 problem sets 1–4, then exam 1 from 2009, 2008 or 2006, with the self-check shown.
Steps
- Study the linked course material.
- Solve the problems on your own first.
- Check them against the self-check and rework the misses.
- Typeset the write-up (LaTeX or a notebook) in a public repo.
- Ask someone who knows the subject to check it.
Template
README ECE 5: Electronic Devices and Analog Circuits, unit 1: Semiconductors, pn junctions and BJTs Problems: Self-check result (matched / reworked): What I got wrong first and why:
What gets sent back
- No working shown.
- The self-check result is missing.
Resources
Foundationstart here
Depthgo deeper
What a verifier looks for
- Carrier concentrations are worked out with the right assumptions stated.
- Diode I–V answers carry units and sensible orders of magnitude.
- The exam is marked against its solution, with the score stated.
- Is the engineering right, not just the final number?
You'll sign in first, then come straight back here.
MOSFETs, small-signal models and CMOS logic
about 3 weeks (about 12 hrs/week)
Read the 6.012 notes for lectures 9–16 (MOS capacitors, the MOSFET, small-signal models, the CMOS inverter); solve problem sets 5–8. Then solve 6.012 problem sets 5–8, then exam 2 from 2009, 2008 or 2006. Self-check: MIT 6.012 exams with solutions (2006, 2008, 2009). Free tools only.
Proof required
Link the public repo with 6.012 problem sets 5–8, then exam 2 from 2009, 2008 or 2006 written up (a typeset PDF, LaTeX source or notebook), and show the self-check: which answers matched and how you fixed the ones that did not.
What gets checked
- Bias points are found before small-signal analysis.
- gm and ro come from the bias point, with units.
- The exam is marked against its solution, with the score stated.
Common mistakes
- Answers copied from a solution with no working.
- Missing units, or a sign or factor-of-2π slip left unexplained.
Powstik Guide
A public write-up of 6.012 problem sets 5–8, then exam 2 from 2009, 2008 or 2006, with the self-check shown.
Steps
- Study the linked course material.
- Solve the problems on your own first.
- Check them against the self-check and rework the misses.
- Typeset the write-up (LaTeX or a notebook) in a public repo.
- Ask someone who knows the subject to check it.
Template
README ECE 5: Electronic Devices and Analog Circuits, unit 2: MOSFETs, small-signal models and CMOS logic Problems: Self-check result (matched / reworked): What I got wrong first and why:
What gets sent back
- No working shown.
- The self-check result is missing.
Resources
Foundationstart here
Depthgo deeper
What a verifier looks for
- Bias points are found before small-signal analysis.
- gm and ro come from the bias point, with units.
- The exam is marked against its solution, with the score stated.
- Is the engineering right, not just the final number?
You'll sign in first, then come straight back here.
Single-stage and multistage amplifiers and frequency response
about 3 weeks (about 12 hrs/week)
Read the 6.012 notes for lectures 17–24 (common-source, common-gate and common-drain stages, differential and multistage amplifiers, the Miller effect, open-circuit time constants). Then solve 6.012 problem sets 9–10 and the design problem. Self-check: ngspice. Free tools only.
Proof required
Link the public repo with 6.012 problem sets 9–10 and the design problem written up (a typeset PDF, LaTeX source or notebook), and show the self-check: which answers matched and how you fixed the ones that did not.
What gets checked
- Gain, input and output resistance come from the small-signal model.
- Poles are estimated by hand (open-circuit time constants or Miller) and shown next to an ngspice run.
- Gaps over 10% are explained (device model, ignored capacitance).
Common mistakes
- Answers copied from a solution with no working.
- Missing units, or a sign or factor-of-2π slip left unexplained.
Powstik Guide
A public write-up of 6.012 problem sets 9–10 and the design problem, with the self-check shown.
Steps
- Study the linked course material.
- Solve the problems on your own first.
- Check them against the self-check and rework the misses.
- Typeset the write-up (LaTeX or a notebook) in a public repo.
- Ask someone who knows the subject to check it.
Template
README ECE 5: Electronic Devices and Analog Circuits, unit 3: Single-stage and multistage amplifiers and frequency response Problems: Self-check result (matched / reworked): What I got wrong first and why:
What gets sent back
- No working shown.
- The self-check result is missing.
Resources
Foundationstart here
Depthgo deeper
What a verifier looks for
- Gain, input and output resistance come from the small-signal model.
- Poles are estimated by hand (open-circuit time constants or Miller) and shown next to an ngspice run.
- Gaps over 10% are explained (device model, ignored capacitance).
- Is the engineering right, not just the final number?
You'll sign in first, then come straight back here.
Design and test a common-source amplifier
about 3 weeks (about 12 hrs/week)
Make a common-source MOSFET amplifier designed for a stated gain and a stated bandwidth (set by a load capacitor; under 20 kHz if you will measure it on hardware), simulated in ngspice (breadboarding it is optional, costs money). Use a voltage-divider gate bias with a source resistor, so the bias holds when the threshold voltage changes. Pick the resistors by hand and predict drain current, gain and the 3 dB bandwidth. Simulate the operating point, an AC sweep and a transient, and fill a predicted-vs-measured table. Optional, costs money: a breadboard, a 2N7000 MOSFET, resistors, capacitors, a 9 V battery and a cheap multimeter. Feed a phone tone through a 100:1 resistor divider, and measure through a coupling capacitor with your sound card or a USB oscilloscope. Safety: 12 V DC or less, from AA, AAA or 9 V batteries or USB only. Never mains power, never a lithium-polymer pack or loose lithium cell, and never a home-made battery charger. Wear eye protection when soldering or cutting leads. Under 18? Use the simulator, or build and solder with an adult present.
Proof required
Link the public repo with the schematic, the simulator netlist or file, the predicted-vs-measured table and (if you built it) photos of the set-up, and a README that says how to rerun it and what limits the result.
What gets checked
- The schematic, netlist, device model and component values are in the repo.
- The table lists predicted and measured bias current, gain and bandwidth.
- Every gap over 10% is explained (threshold voltage spread, capacitance).
Common mistakes
- A result that nobody else can rerun from the repo.
- A table with no explanation of the gaps.
Powstik Guide
A common-source MOSFET amplifier designed for a stated gain and a stated bandwidth (set by a load capacitor; under 20 kHz if you will measure it on hardware), simulated in ngspice (breadboarding it is optional, costs money), in a public repo.
Steps
- Write down what you expect before you start.
- Use a voltage-divider gate bias with a source resistor, so the bias holds when the threshold voltage changes. Pick the resistors by hand and predict drain current, gain and the 3 dB bandwidth. Simulate the operating point, an AC sweep and a transient, and fill a predicted-vs-measured table.
- Fill the predicted-vs-measured table.
- Explain every gap with a cause someone can check.
- Write the README and ask someone who knows the subject to rerun it.
Template
README ECE 5: Electronic Devices and Analog Circuits — Design and test a common-source amplifier What I expected: How to rerun it: Predicted vs measured: Why they differ:
What gets sent back
- It does not run from the repo.
- No predicted-vs-measured table.
- Mains power, a lithium pack or loose cell, a home-made charger, or more than 12 V DC.
Resources
Foundationstart here
What a verifier looks for
- The schematic, netlist, device model and component values are in the repo.
- The table lists predicted and measured bias current, gain and bandwidth.
- Every gap over 10% is explained (threshold voltage spread, capacitance).
- Rerun it from the repo: does it run, and do the numbers match the table?
- The build uses 12 V DC or less from AA, AAA or 9 V batteries or USB; nothing touches mains, and there is no lithium pack, loose cell or home-made charger.
You'll sign in first, then come straight back here.