Understand Computer Architecture by Building Below the Language
10 weeks · 0 milestones
Build a working assembler, simple CPU emulator, or cache simulator from scratch — the artifact must demonstrate that you understand what happens below the programming language you normally use: instruction encoding, pipeline stages, cache line behaviour, or memory hierarchy trade-offs. The implementation must be accompanied by a written explanation of every design decision in terms of the specific hardware constraint it addresses. Proof: the working implementation and write-up reviewed by a CS lecturer or systems engineer who traces the execution of a program they haven't shown you through your implementation and asks you to explain every step.
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3 milestones
Study the von Neumann architecture, CPU fetch-decode-execute pipeline, and memory hierarchy: registers, L1/L2/L3 cache, DRAM, and storage. Implement a simple CPU simulator in Python or C that executes a basic instruction set (at least fetch, decode, execute, and memory access stages). Complete the MIT OCW 6.004 or Berkeley CS61C problem sets on instruction sets and pipelining.
Proof required
Submit: a public GitHub repository containing your CPU simulator that executes at least five instruction types (e.g. ADD, LOAD, STORE, BRANCH, HALT); a test harness with at least three programs that run correctly on the simulator; and a written explanation (300 words) of the pipeline stages your simulator implements and why pipeline hazards exist. Submit to a CS lecturer or hardware engineer who confirms in writing that the simulator is functionally correct and the explanation demonstrates genuine understanding.
What gets checked
- Simulator is publicly available and executes at least five instruction types with a test harness
- Written explanation addresses pipeline hazards specifically — not just a description of pipeline stages
- A CS lecturer or hardware engineer has confirmed the simulator is correct and the explanation shows genuine understanding