Milestone map
Milestone map
3 milestones
Define the design brief and produce a block diagram with component selection rationale
2–3 weeks (brief definition + block diagram + component selection)
Define an electronics design brief for a real or realistic analogue or mixed-signal circuit. The design must be more complex than the circuit analysis in eng-circuit-analysis-design — suitable examples include: a regulated power supply (rectifier + filter + linear regulator); a sensor signal conditioning circuit (amplification + filtering + level shifting for an ADC input); a battery charging management circuit for a small lithium-ion cell; or a simple class-A audio amplifier with volume control. Specify the design requirements quantitatively (supply voltage, output voltage and current, bandwidth, gain, efficiency target, operating temperature range). Produce a functional block diagram showing the major stages. For each stage, select a component or IC (using free datasheets) with a brief selection rationale (why this component meets the requirements for this stage).
Proof required
Submit: (1) the design brief with all quantitative requirements listed (supply, output, tolerance, bandwidth, operating conditions — at least five numbered requirements); (2) the functional block diagram with one block per design stage and the signal flow labelled; (3) a component selection table (stage, component/IC selected, key specification from datasheet, selection rationale in 1–2 sentences); (4) links to the free datasheets for all major components.
What gets checked
- Design requirements are quantitative and specific — 'output voltage: 5.0 V ± 2%; output current: 0 to 500 mA; ripple: <50 mV peak-to-peak at full load; efficiency: >75% at 250 mA load; input voltage range: 7 V to 12 V' is a valid requirements list; 'produces 5V output' is not
- Component selection rationale references the relevant datasheet specification — 'selected LM7805 because its output voltage accuracy is ±2% (datasheet Table 1), within the ±2% design requirement; its 1A current rating exceeds the 500 mA design maximum by 2×' is a valid rationale; 'commonly used regulator' is not
- Datasheet links are to free public sources — Mouser, Digikey, Texas Instruments, and STMicroelectronics all host free datasheets; no paywalled document links are acceptable
Common mistakes
- Selecting a design so simple it has only one functional stage — a single voltage divider or a single op-amp with no feedback network does not constitute a design with multiple interdependent stages; the design must have at least three functional blocks
- Listing components without referencing the datasheet specifications that justify the selection — component selection without datasheet evidence is conjecture, not engineering selection
Resources
Foundationstart here
Depthgo deeper
Masteryfor the dedicated
What a verifier looks for
- Engineering Design Triad: M1 produces a design artifact (block diagram + component selection table with datasheet evidence) — this is the first of three artifact types required across M1–M3.
- Requirements list must be quantitative — check that each requirement has a number and a unit and a tolerance where applicable.
- Component selection table must reference specific datasheet specifications — check that the rationale cites a table, figure, or parameter name from the datasheet, not general knowledge.
- Datasheet links must be to free public sources — check that all links are accessible without a login or payment.
- Reviewer must be an electrical or electronics engineer with analogue circuit design experience — component selection validity requires domain-specific expertise.
Design and simulate the complete electronics circuit
3–4 weeks (schematic design + calculations + simulation iteration)
Design the full schematic for the electronics circuit based on the block diagram from Milestone 1. For each stage: calculate the component values (resistors, capacitors, inductors) needed to meet the design requirements, showing the derivation. Produce the complete schematic in KiCad Schematic Editor (free) or Falstad Circuit Simulator (free, browser-based). Simulate the circuit in LTspice (free) or Falstad and verify at least three key performance parameters against the design requirements (e.g. output voltage under load, bandwidth at −3 dB, ripple voltage at maximum current). If a parameter falls outside the requirement, iterate the component values and re-simulate.
Proof required
Submit: (1) the complete schematic with all component values annotated (KiCad or Falstad export/screenshot); (2) the component value calculations for at least two stages, showing the design equations and the derivation of each value; (3) the simulation results for three key parameters as screenshots or exported data — each result must be compared against the corresponding design requirement with a margin statement.
What gets checked
- Component value calculations show the design equation before the substitution — 'C = 1/(2π × f_c × R) = 1/(2π × 1000 × 10000) = 15.9 nF → select 15 nF (E24)' is a valid calculation; '15 nF selected' is not
- Three simulation results are each compared against their design requirement with a numerical margin — 'simulated output voltage: 5.03 V; requirement: 5.0 V ± 2% (4.9 V to 5.1 V); margin: within requirement ✓' is a valid margin statement
- Schematic has all component values annotated — a schematic with blank value fields (R?, C?) has not been designed, only drawn
Common mistakes
- Designing by trial and error in simulation without completing the analytical calculations first — a design that works in simulation but has no calculation derivation cannot be understood, explained, or modified by another engineer; calculations must precede simulation
- Simulating only the nominal case and not checking the boundary conditions — a power supply that works at 5 mA but fails at 500 mA has not been verified against its requirements; simulation must test at or near the design limits
Resources
Foundationstart here
Depthgo deeper
Masteryfor the dedicated
What a verifier looks for
- Engineering Design Triad: M2 produces a design artifact (annotated schematic) and an analysis artifact (component value calculations + simulation results with margin statements) — both must be present.
- Calculations must show equations before substitution — check a random sample of two calculations; if they present only the final value, the derivation has been omitted.
- Three simulation results must each include a margin statement — check that each result is compared numerically against a design requirement, not just presented as a screenshot.
- Schematic must have all component values annotated — check for blank value fields.
- Reviewer must be an electrical or electronics engineer with analogue circuit design experience — component value calculation validity and simulation interpretation require discipline-specific expertise.
Compile the electronics design report and present for technical review
2–3 weeks (report compilation + reviewer meeting)
Compile the design brief, block diagram, component selection, schematics, calculations, and simulation results into a structured electronics design report. The report must follow the standard format for an electronics engineering report: executive summary (1 paragraph); design brief and requirements; design approach and block diagram; stage-by-stage design (calculations + schematic extract + simulation result per stage); performance summary table (all design requirements vs. simulated performance); discussion (one design decision that constrained the design, one area where the design could be improved, and one known limitation); and conclusions. Present the report to a qualified reviewer (electrical or electronics engineer with analogue circuit design experience) in a 20–30 minute technical session where they challenge at least two design decisions.
Proof required
Submit: (1) the complete electronics design report (all sections above); (2) the performance summary table (design requirement, simulated value, margin, pass/fail for all requirements); (3) a written record of the reviewer's two technical challenges and your responses (250 words minimum, attributing reviewer by professional role).
What gets checked
- Performance summary table covers all quantitative requirements from M1 — a table that omits some requirements has not fully verified the design; every numbered requirement from the design brief must appear as a row
- Discussion section names a specific design constraint — 'the choice of the LM7805 linear regulator constrained efficiency to approximately 55% at full load because of the high dropout voltage; a switching regulator would achieve >85% but was rejected due to EMI complexity at this design stage' is a valid constraint discussion
- Reviewer challenges are substantive and technical — 'why did you choose this IC?' with the response citing a specific datasheet parameter is substantive; 'does this design work?' is not a technical challenge
Common mistakes
- Omitting the performance summary table — this is the most important section for verifying that the design meets its requirements; a report without it is an incomplete engineering document
- Writing a discussion section that only describes what was done — the discussion must analyse why design decisions were made, what they constrained, and what could be improved; a description of the design belongs in the design approach section
Resources
Foundationstart here
What a verifier looks for
- Engineering Design Triad check: M1–M3 together produce a design artifact (block diagram + annotated schematic), an analysis artifact (component value calculations + simulation results + performance summary table), and a documentation artifact (electronics design report with discussion and conclusions) — confirm all three types are present.
- Performance summary table must cover all requirements from M1 — cross-check the table rows against the M1 requirements list; missing rows are missing verifications.
- Discussion section must analyse design decisions, not describe the design — check that the constraint and improvement discussions name specific technical reasons.
- Reviewer challenges must be recorded with specific technical content — check that the responses cite component specifications or design equations, not general statements.
- Reviewer must be an electrical or electronics engineer with analogue circuit design experience.
- The Proof Accessibility Rule applies — KiCad, LTspice, Falstad, and TI datasheet library are all free.