Circuit Analysis and Design
6 weeks · 0 milestones
Design a real electronic circuit for a specific purpose and document the design with analysis. The circuit must be non-trivial — at minimum an active circuit with at least one transistor or op-amp stage, or a passive filter with defined frequency response specifications. Required documentation: a complete schematic with all component values and part references, DC operating point analysis showing all node voltages and branch currents, AC analysis or transient simulation demonstrating the circuit meets its specification, component selection rationale for at least 3 key components (with alternatives considered), and a tolerance analysis identifying which component tolerances most affect performance. Preferred proof: a physically built circuit with oscilloscope or multimeter measurements demonstrating the circuit meets specification. Accessible alternative: LTspice simulation (free, Windows and Mac) or Falstad Circuit Simulator (browser-based, no install required) with documented simulation results and methodology. Proof artifacts: the schematic and component selection (design artifact) and the simulation or measurement results (analysis artifact). Verification: an electrical engineer reviews the design — 'what happens to your output voltage if this supply varies by ±10%?' — requiring you to reason from your own circuit analysis.
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3 milestones
Select or receive a circuit analysis problem — DC or AC (single-frequency sinusoidal) — with at least 4 nodes and at least two different passive component types (e.g. resistors + capacitors, resistors + inductors). Apply systematic analysis methods: for DC circuits, use node voltage or mesh current method; for AC circuits, apply phasor analysis with impedances. Calculate: all node voltages, all branch currents, and the power consumed or delivered by each source and at least two loads. Verify your results using KVL and KCL closure checks. Free simulation using LTspice XVII (free) or Falstad Circuit Simulator (browser-based, free) is permitted as a check only — you must show the hand calculation first.
Proof required
Submit your analysis showing: (1) the circuit schematic (hand-drawn or drawn in KiCad Schematic Editor free, or Falstad export) with all component values labelled; (2) the full analysis calculation set — clearly stating the method used, every equation written out, and all intermediate values with units; (3) a KVL and KCL verification table confirming closure; (4) a simulation screenshot (LTspice or Falstad) showing voltages and/or currents as a numerical check.
What gets checked
- Analysis method is explicitly stated before any equations are written — node voltage method, mesh current method, or phasor analysis — and applied consistently; switching method mid-calculation without explanation is an error
- KVL and KCL closure check is presented as a numerical table, not a verbal statement — e.g. 'Sum of voltages around loop 1: 12V − 3.2V − 4.8V − 4.0V = 0V ✓'
- Units are carried through every intermediate step — a current calculated in mA that is later used in a power calculation must remain in mA (or be explicitly converted) — unitless intermediate values fail the engineering standard